Q. The contour C given below is on the complex plane z = x + jy , where j =√ -1         The value of the integral is ______ Ans: 2

Q. A uniform plane wave traveling in free space and having the electric field is incident on a dielectric medium (relative permittivity > 1, relative permeability = 1) as shown in the figure and there is no reflected wave. The relative permittivity (correct to two decimal places) of the dielectric medium is Ans: 2 Sol:

Q. The logic gates shown in the digital circuit below use strong pull-down nMOS transistors for LOW logic level at the outputs. When the pull-downs are off, high-value resistors set the output logic levels to HIGH (i.e. the pull-ups are weak). Note that some nodes are intentionally shorted to implement “wired logic”. Such shorted nodes

Q. In the circuit shown below, a positive edge-triggered D Flip-Flop is used for sampling input data 𝐷𝑖𝑛 using clock 𝐶𝐾. The XOR gate outputs 3.3 volts for logic HIGH and 0 volts for logic LOW levels. The data bit and clock periods are equal and the value of Δ𝑇/𝑇𝐶𝐾 = 0.15, where the parameters

Q. A solar cell of area 1.0 cm2 , operating at 1.0 sun intensity, has a short circuit current of 20 mA, and an open circuit voltage of 0.65 V. Assuming room temperature operation and thermal equivalent voltage of 26 mV, the open circuit voltage (in volts, correct to two decimal places) at 0.2 sun intensity is Ans: 0.59

Q. For a unity feedback control system with the forward path transfer function The peak resonant magnitude M r of the closed-loop frequency response is 2. The corresponding value of the gain K (correct to two decimal places) is  Ans: 14 – 17

Q. The input 4sinc(2𝑡) is fed to a Hilbert transformer to obtain 𝑦(𝑡), as shown in the figure below: Ans: 8

Q. An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node A, connected to the negative input of the op-amp as indicated in the figure is    . Ans: 0.4 – 0.6

Q. A dc current of 26 μA flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, the diode has a junction capacitance of 0.5 nF . Its neutral region resistances can be neglected. Assume that the room temperature thermal

Q. For the circuit given in the figure, the magnitude of the loop current (in amperes, correct to three decimal places) 0.5 second after closing the switch is  Ans: 0.284 – 0.348