Microcontrollers and Applications Quiz | Microcontrollers and Applications Multiple Choice Questions with Answers
Questions
61
Which potential mode of operation indicate the frequent sending of byte to the slave corresponding to the reception of an acknowledge signal when it becomes desirable for the master to write to the slave during data transmission in I2C bus?
Answer: Master in master-transmit mode & Slave in slave-receive mode
62
What is the directional nature of two active wires SDA & SCL usually adopted in I2C Bus for carrying the information between the devices?
Answer: Bi-directional
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63
What does an IC that initiate or enable the data transfer on bus can be regarded as, in accordance to the I2c protocol specifications?
Answer: Bus Master
64
Which mechanism automates the enabling of RS485 transceiver with an elimination of hardware handshake line during each time of the data transmission?
Answer: Send Data Control
65
Which protocol standard of serial communication specify the bi-directional and half-duplex form of data transmission by allowing various numbers of drivers and receivers in bus configuration?
Answer: RS2485
66
Which among the below stated lines represent the handshaking variant usually and only controlled by the software in the handshaking process?
Answer: XON/ XOFF
67
Which lines are utilized during the enable state of hardware flow control in DTE and DCE devices of RS232?
Answer: RTS & CTS
68
Which characteristics of an embedded system exhibit the responsiveness to the assortments or variations in system’s environment by computing specific results for real-time applications without any kind of postponement?
Answer: Reactive & Real time Characteristics
69
Which abstraction level undergo the compilation process by converting a sequential program into finite-state machine and register transfers while designing an embedded system?
Answer: Behaviour
70
What are the essential tight constraint/s related to the design metrics of an embedded system?
Answer: All of the above
71
Which feature deals with the fetching of next instruction during the execution of current instruction irrespective of the memory access?
Answer: Pre-fetching
72
Which kind of multiplexing scheme is adopted by Von-Newman architecture especially for program and data fetching purposes?
Answer: Time Division Multiplexing
73
Which factors/parameters contribute to an effective utilization or adoption of Harvard architecture by most of the DSPs for streaming data?
Answer: Both a & b
74
Which architectural scheme has a provision of two sets for address & data buses between CPU and memory?
Answer: Harvard architecture
75
Which register of current procedure resemble physically similar to the parameter register of called procedure during register to register operation in an overlapping window of RISC Processors?
Answer: Temporary Register
76
What does the compact and uniform nature of instructions in RISC processors facilitate to?
Answer: Pipelining
77
What are the significant designing issues/factors taken into consideration for RISC Processors?
Answer: All of the above
78
How are the address and data buses removed in external memory type of microcontrollers?
Answer: Through multiplexing by external latch & ALE signal
79
External Memory Microcontrollers can overcome the limitations of insufficient in-built program and data memory by allowing the connections of external memory using _________
Answer: Parallel Port Pins as address and data lines
80
Which microcontrollers offer the provisional and salient software features of fault handling capability, interrupt vector efficiency and versatile addressing?
Answer: Intel 80960 (32 bit)
